# ARM Cortex-M > [!quote] The ARM Cortex-M is a group of 32-bit RISC ARM processor cores licensed by Arm Holdings. These cores are optimized for low-cost and energy-efficient integrated circuits, which have been embedded in tens of billions of consumer devices.[1] Though they are most often the main component of microcontroller chips, sometimes they are embedded inside other types of chips too. The Cortex-M family consists of Cortex-M0, Cortex-M0+, Cortex-M1, Cortex-M3, Cortex-M4, Cortex-M7, Cortex-M23, Cortex-M33, Cortex-M35P, Cortex-M55.[2][3][4][5][6][7][8] The Cortex-M4 / M7 / M33 / M35P / M55 cores have an FPU silicon option, and when included in the silicon these cores are sometimes known as "Cortex-Mx with FPU" or "Cortex-MxF", where 'x' is the core variant. > > [ARM Cortex-M - Wikipedia](https://en.wikipedia.org/wiki/ARM_Cortex-M) ## Cortex M0+ - [[ARM AMBA]] [[interconnect]] - Optimized superset of M0 (complete compatibility instruction wise) - potential addition of a micro trace buffer - potential addition of MPU and vector table relocation - [[ARM Architectures]] Armv6-M architecture - Most [[ARM Thumb Instruction Set|thumb]]-1 instructions - Most [[ARM Thumb Instruction Set|thumb]]-2 instructions - 32-bit hardware integer multiply with 32-bit result - 2 Stage pipeline - 15 cycles interrupt latency